Are there any plans to support RISC-V?
I tried hotspot on SiFive P550 and see the following:
// dump file collected with simple `perf record -e branches -- <my app>`
feature not properly read PerfHeader::CACHE 8 0
feature not properly read PerfHeader::SAMPLE_TIME 16 0
feature not properly read PerfHeader::BPF_BTF 4 0
1 528384 6 1 0
feature not properly read PerfHeader::BPF_PROG_INFO 4 0
feature not properly read PerfHeader::CPU_TOPOLOGY 380 348
feature not properly read PerfHeader::CPU_PMU_CAPS 4 0
Linux version "6.6.21" detected. Switching to automatic buffering.
No information about CPU architecture found. Cannot unwind.
"The hotspot-perfparser binary exited with code 6 (invalid perf data file)."An estimate of how hard it would be to add the RISC-V support would also be great. Thank you for considering.
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milianw1y agoCan you record some data on a small test binary compiled statically for RISC-V, then attach the static binary and the accompanying perf.data file?
An estimate of how hard it would be to add the RISC-V support would also be great.
Potentially trivial, assuming elfutils already supports that arch. we'd first need to extend perfregisterinfo.h/cpp based on info we can hopefully copy from the linux kernel and then hope for the best. then there might be arch specifics we might need to take into account, but that is only possible with someone who knows the details on that platform, i.e. do we need to adjust the instruction pointer address in a similar fashion as we do for ARM?
dendibakh1y agoSorry for the delay. Please find the binary and the perf.data: data.zip
Just in case, here is some other info...
Sources are here: https://github.com/dendibakh/perf-ninja/tree/main/labs/misc/warmup
perf version 6.6.21
kernel version 6.6.21-9-premierCollected with:
$ perf record -e task-clock ./lab
2025-04-09T23:46:11+00:00
Running ./lab
Run on (4 X 1400 MHz CPU s)
Load Average: 0.03, 0.32, 0.85
-----------------------------------------------------
Benchmark Time CPU Iterations
-----------------------------------------------------
bench1 1015 ns 1015 ns 678512
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.124 MB perf.data (3218 samples) ]The output of perf report:
Samples: 3K of event 'task-clock:u', 4000 Hz, Event count (approx.): 804500000
solution(int*, int) /home/dendibakh/perf-ninja/labs/misc/warmup/build/lab [Percent: local period]
Percent│
│
│
│ Disassembly of section .text:
│
│ 00000000000120cc <solution(int*, int)>:
│ solution(int*, int):
│
│ #include "solution.h"
│
│ int solution(int *arr, int N) {
│ int res = 0;
│ for (int i = 0; i < N; i++) {
0.16 │120cc: ↓ blez a1,120e6 <solution(int*, int)+0x1a>
│120d0: slli a1,a1,0x2
│120d2: mv a5,a0
0.06 │120d4: add a3,a0,a1
│ int res = 0;
│120d8: li a0,0
│ res += arr[i];
27.73 │120da: lw a4,0(a5)
│ for (int i = 0; i < N; i++) {
24.11 │120dc: addi a5,a5,4
│ res += arr[i];
24.27 │120de: addw a0,a0,a4
│ for (int i = 0; i < N; i++) {
23.02 │120e0: → bne a3,a5,120da <solution(int*, int)+0xe>
0.66 │120e4: ← ret
│ int res = 0;
│120e6: li a0,0
│ }
│ return res;
│ }
│120e8: ← ret
Sorry for the delay. Please find the binary and the perf.data: data.zip
Just in case, here is some other info...
Sources are here: https://github.com/dendibakh/perf-ninja/tree/main/labs/misc/warmup
perf version 6.6.21
kernel version 6.6.21-9-premierCollected with:
$ perf record -e task-clock ./lab
2025-04-09T23:46:11+00:00
Running ./lab
Run on (4 X 1400 MHz CPU s)
Load Average: 0.03, 0.32, 0.85
-----------------------------------------------------
Benchmark Time CPU Iterations
-----------------------------------------------------
bench1 1015 ns 1015 ns 678512
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.124 MB perf.data (3218 samples) ]The output of perf report:
Samples: 3K of event 'task-clock:u', 4000 Hz, Event count (approx.): 804500000
solution(int*, int) /home/dendibakh/perf-ninja/labs/misc/warmup/build/lab [Percent: local period]
Percent│
│
│
│ Disassembly of section .text:
│
│ 00000000000120cc <solution(int*, int)>:
│ solution(int*, int):
│
│ #include "solution.h"
│
│ int solution(int *arr, int N) {
│ int res = 0;
│ for (int i = 0; i < N; i++) {
0.16 │120cc: ↓ blez a1,120e6 <solution(int*, int)+0x1a>
│120d0: slli a1,a1,0x2
│120d2: mv a5,a0
0.06 │120d4: add a3,a0,a1
│ int res = 0;
│120d8: li a0,0
│ res += arr[i];
27.73 │120da: lw a4,0(a5)
│ for (int i = 0; i < N; i++) {
24.11 │120dc: addi a5,a5,4
│ res += arr[i];
24.27 │120de: addw a0,a0,a4
│ for (int i = 0; i < N; i++) {
23.02 │120e0: → bne a3,a5,120da <solution(int*, int)+0xe>
0.66 │120e4: ← ret
│ int res = 0;
│120e6: li a0,0
│ }
│ return res;
│ }
│120e8: ← ret
Hello @lievenhey , @milianw , is there an update on this issue? Is anything blocking https://github.com/KDAB/perfparser/pull/39 or https://github.com/KDAB/hotspot/pull/709 ?
dendibakh1y agoHello @lievenhey , @milianw , is there an update on this issue? Is anything blocking https://github.com/KDAB/perfparser/pull/39 or https://github.com/KDAB/hotspot/pull/709 ?
Can you record some data on a small test binary compiled statically for RISC-V, then attach the static binary and the accompanying
perf.datafile?Potentially trivial, assuming elfutils already supports that arch. we'd first need to extend
perfregisterinfo.h/cppbased on info we can hopefully copy from the linux kernel and then hope for the best. then there might be arch specifics we might need to take into account, but that is only possible with someone who knows the details on that platform, i.e. do we need to adjust the instruction pointer address in a similar fashion as we do for ARM?